!sched/clock: drop CONFIG_SYSTEM_TIME64 / CONFIG_HAVE_LONG_LONG / CONFIG_LIBC_LONG_LONG and sclock_t

Documentation/applications/netutils/ntpclient/index.rst

@@ -167,7 +167,6 @@ The NTP client requires:
 - **CONFIG_NET_UDP**: UDP protocol support
 - **CONFIG_NET_SOCKOPTS**: Socket options support
 - **CONFIG_LIBC_NETDB**: DNS resolution (recommended)
-- **CONFIG_HAVE_LONG_LONG**: 64-bit integer support
 
 For best results, ensure:
 - Stable network connectivity

Documentation/guides/rust.rst

@@ -57,7 +57,6 @@ Please ensure that you have a working NuttX build environment, and with the foll
 
 Please enable the following configurations in your NuttX configuration:
 
-- CONFIG_SYSTEM_TIME64
 - CONFIG_FS_LARGEFILE
 - CONFIG_TLS_NELEM = 16
 - CONFIG_DEV_URANDOM

arch/arm/src/armv7-a/arm_perf.c

@@ -95,6 +95,6 @@ void up_perf_convert(clock_t elapsed, struct timespec *ts)
 
   ts->tv_sec  = elapsed / g_cpu_freq;
   left        = elapsed - ts->tv_sec * g_cpu_freq;
-  ts->tv_nsec = NSEC_PER_SEC * (uint64_t)left / g_cpu_freq;
+  ts->tv_nsec = NSEC_PER_SEC * left / g_cpu_freq;
 }
 #endif

arch/arm/src/armv7-m/arm_perf.c

@@ -76,6 +76,6 @@ void up_perf_convert(clock_t elapsed, struct timespec *ts)
 
   ts->tv_sec  = elapsed / g_cpu_freq;
   left        = elapsed - ts->tv_sec * g_cpu_freq;
-  ts->tv_nsec = NSEC_PER_SEC * (uint64_t)left / g_cpu_freq;
+  ts->tv_nsec = NSEC_PER_SEC * left / g_cpu_freq;
 }
 #endif

arch/arm/src/armv7-r/arm_perf.c

@@ -91,7 +91,7 @@ void up_perf_convert(clock_t elapsed, struct timespec *ts)
 
   ts->tv_sec  = elapsed / g_cpu_freq;
   left        = elapsed - ts->tv_sec * g_cpu_freq;
-  ts->tv_nsec = NSEC_PER_SEC * (uint64_t)left / g_cpu_freq;
+  ts->tv_nsec = NSEC_PER_SEC * left / g_cpu_freq;
 }
 #endif /* CONFIG_BUILD_FLAT || __KERNEL__ */
 

arch/arm/src/armv8-m/arm_perf.c

@@ -76,6 +76,6 @@ void up_perf_convert(clock_t elapsed, struct timespec *ts)
 
   ts->tv_sec  = elapsed / g_cpu_freq;
   left        = elapsed - ts->tv_sec * g_cpu_freq;
-  ts->tv_nsec = NSEC_PER_SEC * (uint64_t)left / g_cpu_freq;
+  ts->tv_nsec = NSEC_PER_SEC * left / g_cpu_freq;
 }
 #endif

arch/arm/src/armv8-r/arm_perf.c

@@ -87,6 +87,6 @@ void up_perf_convert(clock_t elapsed, struct timespec *ts)
 
   ts->tv_sec  = elapsed / g_cpu_freq;
   left        = elapsed - ts->tv_sec * g_cpu_freq;
-  ts->tv_nsec = NSEC_PER_SEC * (uint64_t)left / g_cpu_freq;
+  ts->tv_nsec = NSEC_PER_SEC * left / g_cpu_freq;
 }
 #endif /* CONFIG_ARCH_PERF_EVENTS */

arch/arm/src/cxd56xx/cxd56_cisif.c

@@ -288,7 +288,7 @@ static uint64_t cisif_get_msec_time(void)
 
   clock_systime_timespec(&tp);
 
-  return (((uint64_t)tp.tv_sec) * 1000 + tp.tv_nsec / 1000000);
+  return tp.tv_sec * 1000 + tp.tv_nsec / 1000000;
 }
 
 static void cisif_trace_time_start(void)

arch/arm/src/cxd56xx/cxd56_nxaudio.c

@@ -2096,8 +2096,8 @@ static int cxd56_power_on_micbias(struct cxd56_dev_s *dev)
 
   clock_systime_timespec(&start);
 
-  dev->mic_boot_start = (uint64_t)start.tv_sec * 1000 +
-                        (uint64_t)start.tv_nsec / 1000000;
+  dev->mic_boot_start = start.tv_sec * 1000 +
+                        start.tv_nsec / 1000000;
 
   return OK;
 }
@@ -2951,8 +2951,8 @@ static int cxd56_start(struct audio_lowerhalf_s *lower)
 
           clock_systime_timespec(&end);
 
-          uint64_t time = (uint64_t)end.tv_sec * 1000 +
-                          (uint64_t)end.tv_nsec / 1000000 -
+          uint64_t time = end.tv_sec * 1000 +
+                          end.tv_nsec / 1000000 -
                            priv->mic_boot_start;
 
           if (time < CXD56_MIC_BOOT_WAIT)

arch/arm/src/cxd56xx/cxd56_rtc.c

@@ -75,7 +75,7 @@
 
 /* convert seconds to 64bit counter value running at 32kHz */
 
-#define SEC_TO_CNT(sec) ((uint64_t)(((uint64_t)(sec)) << 15))
+#define SEC_TO_CNT(sec) (((uint64_t)(sec)) << 15)
 
 /* convert nano-seconds to 32kHz counter less than 1 second */
 
@@ -157,7 +157,7 @@ static void rtc_dumptime(const struct timespec *tp, const char *msg)
   gmtime_r(&tp->tv_sec, &tm);
 
   rtcinfo("%s:\n", msg);
-  rtcinfo("RTC %u.%09u\n", tp->tv_sec, tp->tv_nsec);
+  rtcinfo("RTC %jd.%09ld\n", (intmax_t)tp->tv_sec, tp->tv_nsec);
   rtcinfo("%4d/%02d/%02d %02d:%02d:%02d\n",
           tm.tm_year, tm.tm_mon, tm.tm_mday,
           tm.tm_hour, tm.tm_min, tm.tm_sec);
@@ -394,7 +394,7 @@ time_t up_rtc_time(void)
   count += g_rtc_save->offset;
   count >>= 15; /* convert to 1sec resolution */
 
-  return (time_t)count / CONFIG_RTC_FREQUENCY;
+  return count / CONFIG_RTC_FREQUENCY;
 }
 #endif
 
@@ -481,7 +481,7 @@ int up_rtc_settime(const struct timespec *tp)
   /* Only save the difference from HW raw value */
 
   count = SEC_TO_CNT(tp->tv_sec) | NSEC_TO_PRECNT(tp->tv_nsec);
-  g_rtc_save->offset = (int64_t)count - (int64_t)cxd56_rtc_count();
+  g_rtc_save->offset = count - cxd56_rtc_count();
 #endif
 
   cxd56_update_basetime(&g_basetime);

arch/arm/src/cxd56xx/cxd56_timer.c

@@ -336,7 +336,7 @@ static int cxd56_getstatus(struct timer_lowerhalf_s *lower,
 
   /* Get the time remaining until the timer expires (in microseconds). */
 
-  remaining = (uint64_t)getreg32(priv->base + CXD56_TIMER_VALUE);
+  remaining = getreg32(priv->base + CXD56_TIMER_VALUE);
   status->timeleft =
     (uint32_t)(remaining * 1000000ULL * TIMER_DIVIDER / priv->clkticks);
 

arch/arm/src/cxd56xx/cxd56_wdt.c

@@ -391,7 +391,7 @@ static int cxd56_getstatus(struct watchdog_lowerhalf_s *lower,
 
   /* Get the time remaining until the watchdog expires (in milliseconds) */
 
-  remain           = (uint64_t)cxd56_getreg(CXD56_WDT_WDOGVALUE);
+  remain           = cxd56_getreg(CXD56_WDT_WDOGVALUE);
   status->timeleft = (uint32_t)(remain * 1000 / cxd56_get_cpu_baseclk());
   if (cxd56_getreg(CXD56_WDT_WDOGRIS) != WDOGRIS_RAWINT)
     {

arch/arm/src/efm32/efm32_rtc_burtc.c

@@ -398,7 +398,7 @@ int up_rtc_initialize(void)
 #ifndef CONFIG_RTC_HIRES
 time_t up_rtc_time(void)
 {
-  return (time_t)efm32_get_burtc_tick() / CONFIG_RTC_FREQUENCY;
+  return efm32_get_burtc_tick() / CONFIG_RTC_FREQUENCY;
 }
 #endif
 
@@ -431,7 +431,7 @@ int up_rtc_gettime(struct timespec *tp)
   tp->tv_nsec = (val % CONFIG_RTC_FREQUENCY) *
                 (NSEC_PER_SEC / CONFIG_RTC_FREQUENCY);
 
-  rtcinfo("Get RTC %u.%09u\n", tp->tv_sec, tp->tv_nsec);
+  rtcinfo("Get RTC %jd.%09ld\n", (intmax_t)tp->tv_sec, tp->tv_nsec);
 
   return OK;
 }
@@ -466,7 +466,7 @@ int up_rtc_settime(const struct timespec *tp)
 
   /* Compute Burtc offset because we cannot reset counter */
 
-  val = (((uint64_t)tp->tv_sec) * CONFIG_RTC_FREQUENCY) + \
+  val = (tp->tv_sec * CONFIG_RTC_FREQUENCY) + \
         (tp->tv_nsec / (NSEC_PER_SEC / CONFIG_RTC_FREQUENCY));
 
   if (val < cnt_reg)
@@ -481,8 +481,8 @@ int up_rtc_settime(const struct timespec *tp)
   cnt_carry = val / __CNT_TOP;
   cnt       = val % __CNT_TOP;
 
-  rtcinfo("Set RTC %u.%09u carry %u zero %u reg %u\n",
-           tp->tv_sec, tp->tv_nsec, cnt_carry, cnt, cnt_reg);
+  rtcinfo("Set RTC %jd.%09ld carry %u zero %u reg %u\n",
+           (intmax_t)tp->tv_sec, tp->tv_nsec, cnt_carry, cnt, cnt_reg);
 
   putreg32(cnt_carry, __CNT_CARRY_REG);
   putreg32(cnt      , __CNT_ZERO_REG);

arch/arm/src/imxrt/imxrt_rtc_lowerhalf.c

@@ -463,7 +463,7 @@ static int imxrt_rdalarm(struct rtc_lowerhalf_s *lower,
 
       /* Get the current alarm setting in seconds */
 
-      alarm = (time_t)imxrt_hprtc_getalarm();
+      alarm = imxrt_hprtc_getalarm();
 
       /* Convert the one second epoch time to a struct tm */
 

arch/arm/src/imxrt/imxrt_tickless.c

@@ -501,7 +501,7 @@ int up_timer_gettime(struct timespec *ts)
 int up_alarm_start(const struct timespec *ts)
 {
   size_t offset = 1;
-  uint64_t tm = ((uint64_t)ts->tv_sec * NSEC_PER_SEC + ts->tv_nsec) /
+  uint64_t tm = (ts->tv_sec * NSEC_PER_SEC + ts->tv_nsec) /
                 NSEC_PER_TICK;
   irqstate_t flags;
   uint32_t regval;

arch/arm/src/kinetis/kinetis_rtc_lowerhalf.c

@@ -515,8 +515,7 @@ static int kinetis_rdalarm(struct rtc_lowerhalf_s *lower,
       flags = enter_critical_section();
       ret = kinetis_rtc_rdalarm(&ts);
 
-      localtime_r((const time_t *)&ts.tv_sec,
-                  (struct tm *)alarminfo->time);
+      localtime_r(&ts.tv_sec, (struct tm *)alarminfo->time);
       leave_critical_section(flags);
     }
 

arch/arm/src/lc823450/lc823450_dvfs2.c

@@ -131,7 +131,7 @@ static uint64_t _get_current_time64(void)
   struct timespec ts;
 
   clock_systime_timespec(&ts);
-  return (uint64_t)ts.tv_sec * NSEC_PER_SEC + (uint64_t)ts.tv_nsec;
+  return ts.tv_sec * NSEC_PER_SEC + ts.tv_nsec;
 }
 
 /****************************************************************************

arch/arm/src/lc823450/lc823450_rtc.c

@@ -173,7 +173,7 @@ static void tm_divider(struct tm *tm, int divn, int divm)
 {
   time_t tt;
   tt = timegm(tm);
-  tt = (time_t) ((uint64_t)tt * divn / divm);
+  tt = tt * divn / divm;
   gmtime_r(&tt, tm);
 }
 #endif /* CONFIG_RTC_DIV */

arch/arm/src/lc823450/lc823450_timer.c

@@ -706,7 +706,7 @@ int up_rtc_gettime(struct timespec *tp)
 
   /* Get the elapsed time */
 
-  elapsed = NSEC_PER_TICK * (uint64_t)clock_systime_ticks();
+  elapsed = NSEC_PER_TICK * clock_systime_ticks();
 
   /* Add the timer fraction in nanoseconds */
 
@@ -724,9 +724,9 @@ int up_rtc_gettime(struct timespec *tp)
 
   /* And return the result to the caller. */
 
-  tp->tv_sec  = (time_t)secs;
-  tp->tv_nsec = (long)nsecs;
+  tp->tv_sec  = secs;
+  tp->tv_nsec = nsecs;
 
-  tmrinfo("Returning tp=(%d,%d)\n", (int)tp->tv_sec, (int)tp->tv_nsec);
+  tmrinfo("Returning tp=(%jd,%ld)\n", (intmax_t)tp->tv_sec, tp->tv_nsec);
   return OK;
 }

arch/arm/src/lpc31xx/lpc31_timerisr.c

@@ -97,7 +97,7 @@ void up_timer_initialize(void)
    * of the timer0 module clock (in the AHB0APB1_BASE domain (2)).
    */
 
-  freq = (uint64_t)lpc31_clkfreq(CLKID_TIMER0PCLK, DOMAINID_AHB0APB1);
+  freq = lpc31_clkfreq(CLKID_TIMER0PCLK, DOMAINID_AHB0APB1);
 
   /* If the clock is >1MHz, use pre-dividers */
 
@@ -111,7 +111,7 @@ void up_timer_initialize(void)
       freq   >>= 4;
     }
 
-  load = ((freq * (uint64_t)10000) / 1000000);
+  load = ((freq * 10000) / 1000000);
   putreg32((uint32_t)load, LPC31_TIMER0_LOAD);
 
   /* Set periodic mode */

arch/arm/src/lpc43xx/lpc43_rit.c

@@ -81,7 +81,7 @@ static int lpc43_rit_isr(int irq, void *context, void *arg)
 
   putreg32(RIT_CTRL_INT, LPC43_RIT_CTRL);
 
-  g_internal_timer += (uint64_t)RIT_TIMER_RESOLUTION;
+  g_internal_timer += RIT_TIMER_RESOLUTION;
   if (g_alarm > 0 && g_internal_timer >= g_alarm)
     {
       /* handle expired alarm */
@@ -228,8 +228,7 @@ int up_alarm_start(const struct timespec *ts)
    * coded.
    */
 
-  g_alarm = (uint64_t)ts->tv_sec * (uint64_t)1000000000 +
-            (uint64_t)ts->tv_nsec;
+  g_alarm = ts->tv_sec * 1000000000 + ts->tv_nsec;
   return OK;
 }
 
@@ -252,8 +251,7 @@ int up_timer_start(const struct timespec *ts)
    */
 
   g_alarm = g_internal_timer;
-  g_alarm += (uint64_t)ts->tv_sec * (uint64_t)1000000000 +
-             (uint64_t)ts->tv_nsec;
+  g_alarm += ts->tv_sec * 1000000000 + ts->tv_nsec;
   return OK;
 }
 

arch/arm/src/lpc54xx/lpc54_tickless.c

@@ -273,8 +273,8 @@ static void lpc54_ts_sub(const struct timespec *ts1,
 
 static inline uint64_t lpc54_ts2tick(const struct timespec *ts)
 {
-  return ((uint64_t)ts->tv_sec * LPC54_CCLK +
-          ((uint64_t)ts->tv_nsec / g_min_nsec * g_min_ticks));
+  return (ts->tv_sec * LPC54_CCLK +
+          (ts->tv_nsec / g_min_nsec * g_min_ticks));
 }
 
 static uint64_t lpc54_tick2ts(uint64_t ticks, struct timespec *ts,

arch/arm/src/max326xx/common/max326_rtc_lowerhalf.c

@@ -581,7 +581,7 @@ static int max326_rdalarm(struct rtc_lowerhalf_s *lower,
         {
           /* Extract integer seconds from the b32_t value */
 
-          time_t sec = (time_t)(b32toi(ftime));
+          time_t sec = b32toi(ftime);
 
           /* Convert to struct rtc_time (aka struct tm) */
 

arch/arm/src/nrf52/nrf52_wdt_lowerhalf.c

@@ -362,7 +362,7 @@ static int nrf52_settimeout(struct watchdog_lowerhalf_s *lower,
 
   nrf52_wdt_behaviour_set(priv->mode);
 
-  nrf52_wdt_reload_value_set(((uint64_t) timeout * 32768) / 1000);
+  nrf52_wdt_reload_value_set(((uint64_t)timeout * 32768) / 1000);
 
   up_enable_irq(NRF52_IRQ_WDT);
 

arch/arm/src/rp2040/rp2040_clock.c

@@ -118,7 +118,7 @@ bool rp2040_clock_configure(int clk_index,
    * (left shift by 8)
    */
 
-  div = (uint32_t) (((uint64_t) src_freq << 8) / freq);
+  div = (uint32_t)(((uint64_t)src_freq << 8) / freq);
 
   /* If increasing divisor, set divisor before source. Otherwise set source
    * before divisor. This avoids a momentary overspeed when e.g. switching

arch/arm/src/rp23xx/rp23xx_clock.c

@@ -124,7 +124,7 @@ bool rp23xx_clock_configure(int clk_index,
    * (left shift by 16)
    */
 
-  div = (uint32_t) (((uint64_t) src_freq << 16) / freq);
+  div = (uint32_t)(((uint64_t)src_freq << 16) / freq);
 
   /* If increasing divisor, set divisor before source. Otherwise set source
    * before divisor. This avoids a momentary overspeed when e.g. switching

arch/arm/src/rtl8720c/amebaz_depend.c

@@ -518,7 +518,7 @@ static unsigned int __div64_32(uint64_t *n, unsigned int base)
   if (high >= base)
     {
       high /= base;
-      res = (uint64_t) high << 32;
+      res = (uint64_t)high << 32;
       rem -= (uint64_t)(high * base) << 32;
     }
 

arch/arm/src/s32k3xx/s32k3xx_pinirq.c

@@ -157,7 +157,7 @@ static int s32k3xx_wkpuinterrupt(int irq, void *context, void *arg)
   wisr_64 = getreg32(S32K3XX_WKPU_WISR_64);
   irer_64 = getreg32(S32K3XX_WKPU_IRER_64);
 
-  eif = (wisr & irer) | (((uint64_t) (wisr_64 & irer_64)) << 32);
+  eif = (wisr & irer) | (((uint64_t)(wisr_64 & irer_64)) << 32);
 
   /* Examine each WKPU source */
 

arch/arm/src/sam34/sam4cm_freerun.c

@@ -276,8 +276,8 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts)
   ts->tv_sec  = sec;
   ts->tv_nsec = (usec - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
 
-  tmrinfo("usec=%llu ts=(%lu, %lu)\n",
-          usec, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
+  tmrinfo("usec=%llu ts=(%jd, %ld)\n",
+          usec, (intmax_t)ts->tv_sec, ts->tv_nsec);
 
   return OK;
 }