fix(lilygo_tlora_v2_1): fix lora RST pin

as per schematic https://github.com/Xinyuan-LilyGO/LilyGo-LoRa-Series/blob/master/schematic/T3_V1.6.1.pdf
and confirmed by https://github.com/meshtastic/firmware/blob/develop/variants/esp32/tlora_v2_1_16/variant.h

Author: sgrimee

variants/lilygo_tlora_v2_1/platformio.ini

@@ -14,7 +14,7 @@ build_flags =
   -D P_LORA_DIO_0=26    ; SX1276 DIO0 interrupt pin
   -D P_LORA_DIO_1=33    ; SX1276 DIO1 interrupt pin
   -D P_LORA_NSS=18      ; Chip select - SS pin
-  -D P_LORA_RESET=14    ; Reset pin
+  -D P_LORA_RESET=23    ; Reset pin
   -D P_LORA_SCLK=5      ; SPI clock
   -D P_LORA_MISO=19     ; SPI MISO
   -D P_LORA_MOSI=27     ; SPI MOSI