docs/STATUS.md has carried "sm_121a re-run pending" for this row. It has now been run, and it fails — on both recurrent decode arms, so it is not attributable to whichever arm is selected.
The measurement
dgx:gpu0 (GB10, sm_121a) inside an rc lease, tree e35c14d52 on row/A2-D1-mamba-decode-step, recipe scripts/nemotron-h-a2d1-gpu-gate.sh, real 20.1 GiB NVIDIA-Nemotron-3.5-Lightning-30B-A3B-NVFP4, device mamba arm ON in both legs, cutlass-fp8: ENABLED for [121a] (5 feature cells enabled, so the build is not VOID).
|
ON — single-step decode (vt::Mamba2StateUpdate) |
OFF — chunked decode (vt::Mamba2ChunkScan) |
RC[a3] |
1 |
1 |
| TOKEN MATCH |
95/96 full rows=3, short rows=0, mode=decode |
95/96 full rows=3, short rows=0, mode=decode |
| verdict |
DIVERGENCE |
DIVERGENCE |
| decode-step counters |
state_update_rows=23 chunk_scan_calls=0 gathers=0 scatters=0 |
state_update_rows=0 chunk_scan_calls=23 gathers=46 scatters=46 |
reference-tier lines |
0 |
0 |
| per output token |
1.513958 s |
1.544706 s |
| GPU busy, decode samples |
112 of 1013 = 11.06% |
120 of 1051 = 11.42% |
The counters confirm the two legs really did run different kernels, and both lose exactly one token in 96.
Why this is not the decode-arm change
Same binary, same box, same checkpoint, same prompts. The arm that predates #1311 diverges identically to the one that replaces it, so #1311 is neutral to this. The same code passes on other silicon:
| host |
ON |
OFF |
thor:gpu0 sm_110 |
96/96 STRICT PASS |
96/96 STRICT PASS |
dgx:gpu0 sm_121a |
95/96 DIVERGENCE |
95/96 DIVERGENCE |
So it is arch- or host-specific, not arm-specific.
What is NOT established
Whether both legs lose the SAME token. The counts and the row shape (full rows=3, short rows=0) are identical, which is what supports "neutral", but the driver's got: / exp: ids were discarded by the gate script's verdict grep and are not in the run log. That was a defect in the recipe and is fixed on the branch, so the next run captures them. Until then, "one token in 96 on both arms" is the claim, not "the same token".
That also means a wrong recurrent carry and a benign bf16 near-tie are not yet separated. A single divergent token out of 96 looks identical either way.
Related, and probably not independent
Next traceable step
Re-run the gate on dgx:gpu0 from a branch carrying the repaired script and read the got: / exp: ids for the mismatching row: that says which prompt and which position, and whether the two arms lose the same one. Only then is it worth asking whether the oracle's top-2 margin at that position makes it a tie.
Filed rather than fixed in flow: the defect is in NemotronH on GB10 and predates the change that found it, and it needs its own spec and a lease rather than riding on #1311.
docs/STATUS.mdhas carried "sm_121a re-run pending" for this row. It has now been run, and it fails — on both recurrent decode arms, so it is not attributable to whichever arm is selected.The measurement
dgx:gpu0(GB10, sm_121a) inside anrclease, treee35c14d52onrow/A2-D1-mamba-decode-step, recipescripts/nemotron-h-a2d1-gpu-gate.sh, real 20.1 GiBNVIDIA-Nemotron-3.5-Lightning-30B-A3B-NVFP4, device mamba arm ON in both legs,cutlass-fp8: ENABLED for [121a](5 feature cells enabled, so the build is not VOID).vt::Mamba2StateUpdate)vt::Mamba2ChunkScan)RC[a3]full rows=3, short rows=0, mode=decodefull rows=3, short rows=0, mode=decodeDIVERGENCEDIVERGENCEstate_update_rows=23 chunk_scan_calls=0 gathers=0 scatters=0state_update_rows=0 chunk_scan_calls=23 gathers=46 scatters=46reference-tierlinesThe counters confirm the two legs really did run different kernels, and both lose exactly one token in 96.
Why this is not the decode-arm change
Same binary, same box, same checkpoint, same prompts. The arm that predates #1311 diverges identically to the one that replaces it, so #1311 is neutral to this. The same code passes on other silicon:
thor:gpu0sm_11096/96 STRICT PASS96/96 STRICT PASSdgx:gpu0sm_121a95/96 DIVERGENCE95/96 DIVERGENCESo it is arch- or host-specific, not arm-specific.
What is NOT established
Whether both legs lose the SAME token. The counts and the row shape (
full rows=3, short rows=0) are identical, which is what supports "neutral", but the driver'sgot:/exp:ids were discarded by the gate script's verdict grep and are not in the run log. That was a defect in the recipe and is fixed on the branch, so the next run captures them. Until then, "one token in 96 on both arms" is the claim, not "the same token".That also means a wrong recurrent carry and a benign bf16 near-tie are not yet separated. A single divergent token out of 96 looks identical either way.
Related, and probably not independent
docs/STATUS.md: "GB10 read 4/24; cause and fix NemotronH A3 token gate DIVERGES on real weights: token 0 is correct on all 3 prompts, then decode collapses to a repeated token (6/96) #1157, sm_121a re-run pending" — this IS that re-run.93/96 DIVERGENCEarm for A2-Q1 and concluded the host-arm divergence was an sm_110 result with GB10 as a counter-measurement. This run is the GB10 side and it is not clean.Next traceable step
Re-run the gate on
dgx:gpu0from a branch carrying the repaired script and read thegot:/exp:ids for the mismatching row: that says which prompt and which position, and whether the two arms lose the same one. Only then is it worth asking whether the oracle's top-2 margin at that position makes it a tie.Filed rather than fixed in flow: the defect is in NemotronH on GB10 and predates the change that found it, and it needs its own spec and a lease rather than riding on #1311.