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Merge branch 'espressif:release/v5.4' into release/v5.4
2 parents 0a39bbd + daf465c commit fdcd8ed

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components/app_trace/sys_view/ext/heap_trace_module.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,7 @@ const static char *TAG = "sysview_heap_trace";
2121
#endif
2222

2323
static SEGGER_SYSVIEW_MODULE s_esp_sysview_heap_module = {
24-
.sModule = "ESP32 SystemView Heap Tracing Module",
24+
.sModule = "M=ESP32 SystemView Heap Tracing Module",
2525
.NumEvents = 2,
2626
};
2727

components/bootloader_support/bootloader_flash/include/bootloader_flash_priv.h

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -13,15 +13,19 @@
1313
#include <spi_flash_mmap.h> /* including in bootloader for error values */
1414
#include "sdkconfig.h"
1515
#include "bootloader_flash.h"
16+
#include "soc/ext_mem_defs.h"
1617

1718
#ifdef __cplusplus
1819
extern "C" {
1920
#endif
2021

2122
#define FLASH_SECTOR_SIZE 0x1000
2223
#define FLASH_BLOCK_SIZE 0x10000
24+
2325
#define MMAP_ALIGNED_MASK (SPI_FLASH_MMU_PAGE_SIZE - 1)
2426
#define MMU_FLASH_MASK (~(SPI_FLASH_MMU_PAGE_SIZE - 1))
27+
#define MMU_FLASH_MASK_FROM_VAL(PAGE_SZ) (~((PAGE_SZ) - 1))
28+
#define MMU_DROM_END_ENTRY_VADDR_FROM_VAL(PAGE_SZ) (SOC_DRAM_FLASH_ADDRESS_HIGH - (PAGE_SZ))
2529

2630
/**
2731
* MMU mapping must always be in the unit of a SPI_FLASH_MMU_PAGE_SIZE
@@ -89,7 +93,7 @@ uint32_t bootloader_mmap_get_free_pages(void);
8993
* @param length - Length of data to map.
9094
*
9195
* @return Pointer to mapped data memory (at src_addr), or NULL
92-
* if an allocation error occured.
96+
* if an allocation error occurred.
9397
*/
9498
const void *bootloader_mmap(uint32_t src_addr, uint32_t size);
9599

components/bootloader_support/include/esp_image_format.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,7 @@ typedef struct {
3434
uint32_t image_len; /* Length of image on flash, in bytes */
3535
uint8_t image_digest[32]; /* appended SHA-256 digest */
3636
uint32_t secure_version; /* secure version for anti-rollback, it is covered by sha256 (set if CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK=y) */
37+
uint32_t mmu_page_size; /* Flash MMU page size per binary header */
3738
} esp_image_metadata_t;
3839

3940
typedef enum {

components/bootloader_support/src/bootloader_utility.c

Lines changed: 18 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@
2020
#include "esp_rom_spiflash.h"
2121

2222
#include "soc/soc.h"
23+
#include "soc/soc_caps.h"
2324
#include "soc/rtc.h"
2425
#include "soc/efuse_periph.h"
2526
#include "soc/rtc_periph.h"
@@ -66,7 +67,7 @@ static void set_cache_and_start_app(uint32_t drom_addr,
6667
uint32_t irom_addr,
6768
uint32_t irom_load_addr,
6869
uint32_t irom_size,
69-
uint32_t entry_addr);
70+
const esp_image_metadata_t *data);
7071

7172
esp_err_t bootloader_common_read_otadata(const esp_partition_pos_t *ota_info, esp_ota_select_entry_t *two_otadata)
7273
{
@@ -789,7 +790,7 @@ static void unpack_load_app(const esp_image_metadata_t *data)
789790
rom_addr[1],
790791
rom_load_addr[1],
791792
rom_size[1],
792-
data->image.entry_addr);
793+
data);
793794
}
794795

795796
#else //!SOC_MMU_DI_VADDR_SHARED
@@ -834,7 +835,7 @@ static void unpack_load_app(const esp_image_metadata_t *data)
834835
irom_addr,
835836
irom_load_addr,
836837
irom_size,
837-
data->image.entry_addr);
838+
data);
838839
}
839840
#endif //#if SOC_MMU_DI_VADDR_SHARED
840841

@@ -859,9 +860,11 @@ static void set_cache_and_start_app(
859860
uint32_t irom_addr,
860861
uint32_t irom_load_addr,
861862
uint32_t irom_size,
862-
uint32_t entry_addr)
863+
const esp_image_metadata_t *data)
863864
{
864865
int rc __attribute__((unused));
866+
const uint32_t entry_addr = data->image.entry_addr;
867+
const uint32_t mmu_page_size = data->mmu_page_size;
865868

866869
ESP_EARLY_LOGD(TAG, "configure drom and irom and start");
867870
//-----------------------Disable Cache to do the mapping---------
@@ -871,12 +874,18 @@ static void set_cache_and_start_app(
871874
#else
872875
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
873876
#endif
877+
878+
#if SOC_MMU_PAGE_SIZE_CONFIGURABLE
879+
// re-configure MMU page size
880+
mmu_ll_set_page_size(0, mmu_page_size);
881+
#endif //SOC_MMU_PAGE_SIZE_CONFIGURABLE
882+
874883
//reset MMU table first
875884
mmu_hal_unmap_all();
876885

877886
//-----------------------MAP DROM--------------------------
878-
uint32_t drom_load_addr_aligned = drom_load_addr & MMU_FLASH_MASK;
879-
uint32_t drom_addr_aligned = drom_addr & MMU_FLASH_MASK;
887+
uint32_t drom_load_addr_aligned = drom_load_addr & MMU_FLASH_MASK_FROM_VAL(mmu_page_size);
888+
uint32_t drom_addr_aligned = drom_addr & MMU_FLASH_MASK_FROM_VAL(mmu_page_size);
880889
ESP_EARLY_LOGV(TAG, "rodata starts from paddr=0x%08" PRIx32 ", vaddr=0x%08" PRIx32 ", size=0x%" PRIx32, drom_addr, drom_load_addr, drom_size);
881890
//The addr is aligned, so we add the mask off length to the size, to make sure the corresponding buses are enabled.
882891
drom_size = (drom_load_addr - drom_load_addr_aligned) + drom_size;
@@ -894,13 +903,13 @@ static void set_cache_and_start_app(
894903
ESP_EARLY_LOGV(TAG, "after mapping rodata, starting from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", drom_addr_aligned, drom_load_addr_aligned, actual_mapped_len);
895904
}
896905
//we use the MMU_LL_END_DROM_ENTRY_ID mmu entry as a map page for app to find the boot partition
897-
mmu_hal_map_region(0, MMU_TARGET_FLASH0, MMU_LL_END_DROM_ENTRY_VADDR, drom_addr_aligned, CONFIG_MMU_PAGE_SIZE, &actual_mapped_len);
906+
mmu_hal_map_region(0, MMU_TARGET_FLASH0, MMU_DROM_END_ENTRY_VADDR_FROM_VAL(mmu_page_size), drom_addr_aligned, mmu_page_size, &actual_mapped_len);
898907
ESP_EARLY_LOGV(TAG, "mapped one page of the rodata, from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", drom_addr_aligned, MMU_LL_END_DROM_ENTRY_VADDR, actual_mapped_len);
899908
#endif
900909

901910
//-----------------------MAP IROM--------------------------
902-
uint32_t irom_load_addr_aligned = irom_load_addr & MMU_FLASH_MASK;
903-
uint32_t irom_addr_aligned = irom_addr & MMU_FLASH_MASK;
911+
uint32_t irom_load_addr_aligned = irom_load_addr & MMU_FLASH_MASK_FROM_VAL(mmu_page_size);
912+
uint32_t irom_addr_aligned = irom_addr & MMU_FLASH_MASK_FROM_VAL(mmu_page_size);
904913
ESP_EARLY_LOGV(TAG, "text starts from paddr=0x%08" PRIx32 ", vaddr=0x%08" PRIx32 ", size=0x%" PRIx32, irom_addr, irom_load_addr, irom_size);
905914
//The addr is aligned, so we add the mask off length to the size, to make sure the corresponding buses are enabled.
906915
irom_size = (irom_load_addr - irom_load_addr_aligned) + irom_size;

components/bootloader_support/src/esp32h2/bootloader_esp32h2.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -92,6 +92,8 @@ static inline void bootloader_hardware_init(void)
9292

9393
regi2c_ctrl_ll_master_enable_clock(true);
9494
regi2c_ctrl_ll_master_configure_clock();
95+
REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_0P8, 8); // fix low temp issue, need to increase this internal voltage
96+
9597
}
9698

9799
static inline void bootloader_ana_reset_config(void)

components/bootloader_support/src/esp_image_format.c

Lines changed: 32 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,7 @@
2222
#include "bootloader_memory_utils.h"
2323
#include "soc/soc_caps.h"
2424
#include "hal/cache_ll.h"
25+
#include "spi_flash_mmap.h"
2526

2627
#define ALIGN_UP(num, align) (((num) + ((align) - 1)) & ~((align) - 1))
2728

@@ -77,7 +78,7 @@ static esp_err_t process_segment_data(int segment, intptr_t load_addr, uint32_t
7778
static esp_err_t verify_image_header(uint32_t src_addr, const esp_image_header_t *image, bool silent);
7879

7980
/* Verify a segment header */
80-
static esp_err_t verify_segment_header(int index, const esp_image_segment_header_t *segment, uint32_t segment_data_offs, bool silent);
81+
static esp_err_t verify_segment_header(int index, const esp_image_segment_header_t *segment, uint32_t segment_data_offs, esp_image_metadata_t *metadata, bool silent);
8182

8283
/* Log-and-fail macro for use in esp_image_load */
8384
#define FAIL_LOAD(...) do { \
@@ -559,7 +560,7 @@ static esp_err_t process_segment(int index, uint32_t flash_addr, esp_image_segme
559560

560561
ESP_LOGV(TAG, "segment data length 0x%"PRIx32" data starts 0x%"PRIx32, data_len, data_addr);
561562

562-
CHECK_ERR(verify_segment_header(index, header, data_addr, silent));
563+
CHECK_ERR(verify_segment_header(index, header, data_addr, metadata, silent));
563564

564565
if (data_len % 4 != 0) {
565566
FAIL_LOAD("unaligned segment length 0x%"PRIx32, data_len);
@@ -748,7 +749,7 @@ static esp_err_t process_segment_data(int segment, intptr_t load_addr, uint32_t
748749
return ESP_OK;
749750
}
750751

751-
static esp_err_t verify_segment_header(int index, const esp_image_segment_header_t *segment, uint32_t segment_data_offs, bool silent)
752+
static esp_err_t verify_segment_header(int index, const esp_image_segment_header_t *segment, uint32_t segment_data_offs, esp_image_metadata_t *metadata, bool silent)
752753
{
753754
if ((segment->data_len & 3) != 0
754755
|| segment->data_len >= SIXTEEN_MB) {
@@ -761,13 +762,39 @@ static esp_err_t verify_segment_header(int index, const esp_image_segment_header
761762
uint32_t load_addr = segment->load_addr;
762763
bool map_segment = should_map(load_addr);
763764

765+
#if SOC_MMU_PAGE_SIZE_CONFIGURABLE
766+
/* ESP APP descriptor is present in the DROM segment #0 */
767+
if (index == 0 && metadata->start_addr != ESP_BOOTLOADER_OFFSET) {
768+
const esp_app_desc_t *app_desc = (const esp_app_desc_t *)bootloader_mmap(segment_data_offs, sizeof(esp_app_desc_t));
769+
if (!app_desc || app_desc->magic_word != ESP_APP_DESC_MAGIC_WORD) {
770+
ESP_LOGE(TAG, "Failed to fetch app description header!");
771+
return ESP_FAIL;
772+
}
773+
774+
// Convert from log base 2 number to actual size while handling legacy image case (value 0)
775+
metadata->mmu_page_size = (app_desc->mmu_page_size > 0) ? (1UL << app_desc->mmu_page_size) : SPI_FLASH_MMU_PAGE_SIZE;
776+
if (metadata->mmu_page_size != SPI_FLASH_MMU_PAGE_SIZE) {
777+
ESP_LOGI(TAG, "MMU page size mismatch, configured: 0x%x, found: 0x%"PRIx32, SPI_FLASH_MMU_PAGE_SIZE, metadata->mmu_page_size);
778+
}
779+
bootloader_munmap(app_desc);
780+
} else if (index == 0 && metadata->start_addr == ESP_BOOTLOADER_OFFSET) {
781+
// Bootloader always uses the default MMU page size
782+
metadata->mmu_page_size = SPI_FLASH_MMU_PAGE_SIZE;
783+
}
784+
#else // SOC_MMU_PAGE_SIZE_CONFIGURABLE
785+
metadata->mmu_page_size = SPI_FLASH_MMU_PAGE_SIZE;
786+
#endif // !SOC_MMU_PAGE_SIZE_CONFIGURABLE
787+
788+
const int mmu_page_size = metadata->mmu_page_size;
789+
ESP_LOGV(TAG, "MMU page size 0x%x", mmu_page_size);
790+
764791
/* Check that flash cache mapped segment aligns correctly from flash to its mapped address,
765-
relative to the 64KB page mapping size.
792+
relative to the MMU page mapping size.
766793
*/
767794
ESP_LOGV(TAG, "segment %d map_segment %d segment_data_offs 0x%"PRIx32" load_addr 0x%"PRIx32,
768795
index, map_segment, segment_data_offs, load_addr);
769796
if (map_segment
770-
&& ((segment_data_offs % SPI_FLASH_MMU_PAGE_SIZE) != (load_addr % SPI_FLASH_MMU_PAGE_SIZE))) {
797+
&& ((segment_data_offs % mmu_page_size) != (load_addr % mmu_page_size))) {
771798
if (!silent) {
772799
ESP_LOGE(TAG, "Segment %d load address 0x%08"PRIx32", doesn't match data 0x%08"PRIx32,
773800
index, load_addr, segment_data_offs);

components/bt/CMakeLists.txt

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -85,6 +85,9 @@ if(CONFIG_BT_ENABLED)
8585
elseif(CONFIG_IDF_TARGET_ESP32S3)
8686
list(APPEND ldscripts "linker_rw_bt_controller.lf")
8787
elseif(CONFIG_IDF_TARGET_ESP32C2)
88+
if(CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY)
89+
list(APPEND srcs "controller/esp32c2/dummy.c")
90+
endif()
8891
set(ldscripts "linker_esp32c2.lf")
8992
else()
9093
list(APPEND ldscripts "linker_esp_ble_controller.lf")
@@ -886,8 +889,13 @@ if(CONFIG_BT_ENABLED)
886889
add_prebuilt_library(libble_app
887890
"${CMAKE_CURRENT_LIST_DIR}/controller/lib_esp32c6/esp32c6-bt-lib/esp32c61/libble_app.a")
888891
else()
889-
add_prebuilt_library(libble_app
890-
"controller/lib_${target_name}/${target_name}-bt-lib/libble_app.a")
892+
if(CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY)
893+
add_prebuilt_library(libble_app
894+
"controller/lib_${target_name}/${target_name}-bt-lib/libble_app_flash.a")
895+
else()
896+
add_prebuilt_library(libble_app
897+
"controller/lib_${target_name}/${target_name}-bt-lib/libble_app.a")
898+
endif()
891899
endif()
892900
target_link_libraries(${COMPONENT_LIB} PRIVATE libble_app)
893901
endif()

components/bt/controller/esp32/Kconfig.in

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -444,6 +444,15 @@ config BTDM_CTRL_SCAN_BACKOFF_UPPERLIMITMAX
444444
minimize collision of scan request PDUs from nultiple scanners. If scan backoff is disabled, in active
445445
scanning, scan request PDU will be sent every time when HW receives scannable ADV PDU.
446446

447+
config BTDM_CTRL_CHECK_CONNECT_IND_ACCESS_ADDRESS
448+
bool "Enable enhanced Access Address check in CONNECT_IND"
449+
default n
450+
help
451+
Enabling this option will add stricter verification of the Access Address in the CONNECT_IND PDU.
452+
This improves security by ensuring that only connection requests with valid Access Addresses are accepted.
453+
If disabled, only basic checks are applied, improving compatibility.
454+
455+
447456
config BTDM_BLE_ADV_REPORT_FLOW_CTRL_SUPP
448457
bool "BLE adv report flow control supported"
449458
depends on (BTDM_CTRL_MODE_BTDM || BTDM_CTRL_MODE_BLE_ONLY)

components/bt/controller/esp32/bt.c

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1931,7 +1931,7 @@ esp_err_t esp_bredr_sco_datapath_set(esp_sco_data_path_t data_path)
19311931
return ESP_OK;
19321932
}
19331933

1934-
esp_err_t esp_ble_scan_dupilcate_list_flush(void)
1934+
esp_err_t esp_ble_scan_duplicate_list_flush(void)
19351935
{
19361936
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
19371937
return ESP_ERR_INVALID_STATE;
@@ -1940,6 +1940,11 @@ esp_err_t esp_ble_scan_dupilcate_list_flush(void)
19401940
return ESP_OK;
19411941
}
19421942

1943+
esp_err_t esp_ble_scan_dupilcate_list_flush(void)
1944+
{
1945+
return esp_ble_scan_duplicate_list_flush();
1946+
}
1947+
19431948
/**
19441949
* This function re-write controller's function,
19451950
* As coredump can not show parameters in function which is in a .a file.

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