diff --git a/cortex-m/src/peripheral/dwt.rs b/cortex-m/src/peripheral/dwt.rs
index 58d91fd3..28f66f2d 100644
--- a/cortex-m/src/peripheral/dwt.rs
+++ b/cortex-m/src/peripheral/dwt.rs
@@ -64,10 +64,15 @@ pub struct Comparator {
 
 // DWT CTRL register fields
 const NUMCOMP_OFFSET: u32 = 28;
+#[cfg(not(armv6m))]
 const NOTRCPKT: u32 = 1 << 27;
+#[cfg(not(armv6m))]
 const NOEXTTRIG: u32 = 1 << 26;
+#[cfg(not(armv6m))]
 const NOCYCCNT: u32 = 1 << 25;
+#[cfg(not(armv6m))]
 const NOPRFCNT: u32 = 1 << 24;
+#[cfg(not(armv6m))]
 const CYCCNTENA: u32 = 1 << 0;
 
 impl DWT {
diff --git a/cortex-m/src/peripheral/scb.rs b/cortex-m/src/peripheral/scb.rs
index 7065b963..6d9d4700 100644
--- a/cortex-m/src/peripheral/scb.rs
+++ b/cortex-m/src/peripheral/scb.rs
@@ -5,6 +5,7 @@ use core::arch::asm;
 use core::ptr;
 #[cfg(any(armv7m, armv8m))]
 use core::sync::atomic::{Ordering, compiler_fence};
+#[cfg(not(armv6m))]
 use cortex_m_macros::asm_cfg;
 use volatile_register::RW;