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Merge pull request #2875 from fpistm/STDES-MB2095
variant(u3): add STDES-MB2095 support
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README.md

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@@ -206,6 +206,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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| :green_heart: | STM32H747XIHx | [STM32H747I-DISCO](https://www.st.com/en/evaluation-tools/stm32h747i-disco.html) | *2.7.0* | |
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| :green_heart: | STM32L4S5VI | [B-L4S5I-IOT01A](https://www.st.com/en/evaluation-tools/b-l4s5i-iot01a.html) | *2.0.0* | |
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| :green_heart: | STM32L562QEIxQ | [STM32L562E-DK](https://www.st.com/en/evaluation-tools/stm32l562e-dk.html) | *2.11.0* | |
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| :yellow_heart: | STM32U385VGIxQ | [STDES-MB2095](https://www.st.com/en/evaluation-tools/stdes-mb2095.html) | **2.12.0** | |
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| :green_heart: | STM32U585AIIxQ | [B-U585I-IOT02A](https://www.st.com/en/evaluation-tools/b-u585i-iot02a.html) | *2.1.0* | |
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| :green_heart: | STM32WB5MMG | [STM32WB5MM-DK](https://www.st.com/en/evaluation-tools/stm32wb5mm-dk.html) | *2.1.0* | |
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boards.txt

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@@ -1386,6 +1386,22 @@ Disco.menu.pnum.B_L4S5I_IOT01A.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
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Disco.menu.pnum.B_L4S5I_IOT01A.openocd.target=stm32l4x
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Disco.menu.pnum.B_L4S5I_IOT01A.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L4xx/STM32L4S5.svd
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# STDES_MB2095 board
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Disco.menu.pnum.STDES_MB2095=STDES-MB2095
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Disco.menu.pnum.STDES_MB2095.node="No_mass_storage_for_this_board_Use_STLink_upload_method"
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Disco.menu.pnum.STDES_MB2095.upload.maximum_size=1048576
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Disco.menu.pnum.STDES_MB2095.upload.maximum_data_size=262144
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Disco.menu.pnum.STDES_MB2095.build.mcu=cortex-m33
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Disco.menu.pnum.STDES_MB2095.build.fpu=-mfpu=fpv5-sp-d16
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Disco.menu.pnum.STDES_MB2095.build.float-abi=-mfloat-abi=hard
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Disco.menu.pnum.STDES_MB2095.build.board=STDES_MB2095
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Disco.menu.pnum.STDES_MB2095.build.series=STM32U3xx
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Disco.menu.pnum.STDES_MB2095.build.product_line=STM32U385xx
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Disco.menu.pnum.STDES_MB2095.build.variant=STM32U3xx/U375V(E-G)IxQ_U385VGIxQ
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Disco.menu.pnum.STDES_MB2095.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
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Disco.menu.pnum.STDES_MB2095.openocd.target=stm32u3x
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Disco.menu.pnum.STDES_MB2095.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U385.svd
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# B_U585I_IOT02A board
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Disco.menu.pnum.B_U585I_IOT02A=B-U585I-IOT02A
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Disco.menu.pnum.B_U585I_IOT02A.node="NOD_U585AI,DIS_U585AI"

variants/STM32U3xx/U375V(E-G)IxQ_U385VGIxQ/PeripheralPins_STDES_MB2095.c

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variants/STM32U3xx/U375V(E-G)IxQ_U385VGIxQ/generic_clock.c

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@@ -25,6 +25,12 @@ WEAK void SystemClock_Config(void)
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
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RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
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/** Configure the System Power Supply
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*/
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if (HAL_PWREx_ConfigSupply(PWR_SMPS_SUPPLY) != HAL_OK) {
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Error_Handler();
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}
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/** Enable Epod Booster
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*/
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if (HAL_RCCEx_EpodBoosterClkConfig(RCC_EPODBOOSTER_SOURCE_MSIS, RCC_EPODBOOSTER_DIV1) != HAL_OK) {
@@ -46,11 +52,10 @@ WEAK void SystemClock_Config(void)
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/** Initializes the CPU, AHB and APB buses clocks
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI
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| RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_MSIS;
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_LSI
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| RCC_OSCILLATORTYPE_MSIS;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
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RCC_OscInitStruct.LSIState = RCC_LSI_ON;
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RCC_OscInitStruct.LSIDiv = RCC_LSI_DIV1;
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RCC_OscInitStruct.MSISState = RCC_MSI_ON;
@@ -60,6 +65,7 @@ WEAK void SystemClock_Config(void)
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Error_Handler();
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}
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/** Initializes the CPU, AHB and APB buses clocks
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
@@ -77,8 +83,8 @@ WEAK void SystemClock_Config(void)
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/** Initializes the peripherals clock
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*/
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_DAC1SH | RCC_PERIPHCLK_LPUART1
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| RCC_PERIPHCLK_USB1;
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_DAC1SH | RCC_PERIPHCLK_ICLK
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| RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USB1;
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PeriphClkInit.Dac1SampleHoldClockSelection = RCC_DAC1SHCLKSOURCE_LSI;
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PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI;
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PeriphClkInit.IclkClockSelection = RCC_ICLKCLKSOURCE_HSI48;

variants/STM32U3xx/U375V(E-G)IxQ_U385VGIxQ/ldscript.ld

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@@ -5,7 +5,7 @@
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**
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** @author : Auto-generated by STM32CubeIDE
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**
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** @brief : Linker script for STM32U385VGIx Device from STM32U3 series
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** @brief : Linker script for STM32U385VGIxQ Device from STM32U3 series
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** 1024KBytes FLASH
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** 192KBytes RAM
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** 64KBytes RAM2
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MEMORY
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{
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
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/* RAM2 is contiguous to RAM, declare only one block */
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/* RAM2 (xrw) : ORIGIN = 0x20030000, LENGTH = 64K */
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FLASH (rx) : ORIGIN = 0x08000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
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}
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/* Sections */
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SECTIONS
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{
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/* The startup code into "FLASH" Rom type memory */
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.isr_vector :
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{
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/*
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*******************************************************************************
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* Copyright (c) 2025, STMicroelectronics
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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*******************************************************************************
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*/
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#if defined(ARDUINO_STDES_MB2095)
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#include "pins_arduino.h"
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// Digital PinName array
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const PinName digitalPin[] = {
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PA_12, // D0
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PA_11, // D1
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PH_3, // D2
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PB_1, // D3/A11
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PB_13, // D4
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PB_10, // D5
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PB_11, // D6
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PA_14, // D7
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PA_13, // D8
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PD_0, // D9
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PD_1, // D10
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PD_15, // D11
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PB_9, // D12
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PB_6, // D13
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PA_15, // D14
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PE_13, // D15
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PE_15, // D16
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PE_14, // D17
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PB_3, // D18
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PD_5, // D19
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PA_6, // D20/A12
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PB_2, // D21/A13
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PA_9, // D22
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PA_10, // D23
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PD_14, // D24
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PC_0, // D25/A14
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PC_1, // D26/A15
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PA_2, // D27/A16
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PE_0, // D28
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PC_7, // D29
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PE_8, // D30
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PB_8, // D31
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PE_9, // D32
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PB_4, // D33
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PE_5, // D34
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PE_4, // D35
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PE_7, // D36
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PE_6, // D37
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PE_2, // D38
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PC_12, // D39
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PD_2, // D40
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PC_8, // D41
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PC_9, // D42
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PC_10, // D43
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PC_11, // D44
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PH_0, // D45
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PA_4, // D46/A0
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PA_5, // D47/A1
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PA_3, // D48/A2
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PA_0, // D49/A3
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PA_1, // D50/A4
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PD_13, // D51/A5
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PD_12, // D52/A6
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PE_10, // D53
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PE_12, // D54
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PB_0, // D55/A7
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PA_7, // D56/A8
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PC_6, // D57
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PD_4, // D58
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PC_2, // D59/A9
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PC_3, // D60/A10
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PD_7, // D61
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PE_3, // D62
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PE_11, // D63
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PB_5, // D64
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PB_7, // D65
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PD_11, // D66/A17
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PB_15, // D67
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PB_14, // D68
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PA_8, // D69
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PD_8, // D70
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PD_9, // D71
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PC_14, // D72
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PC_15 // D73
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};
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// Analog (Ax) pin number array
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const uint32_t analogInputPin[] = {
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46, // A0, PA4
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47, // A1, PA5
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48, // A2, PA3
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49, // A3, PA0
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50, // A4, PA1
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51, // A5, PD13
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52, // A6, PD12
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55, // A7, PB0
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56, // A8, PA7
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59, // A9, PC2
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60, // A10, PC3
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3, // A11, PB1
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20, // A12, PA6
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21, // A13, PB2
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25, // A14, PC0
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26, // A15, PC1
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27, // A16, PA2
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66 // A17, PD11
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};
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// ----------------------------------------------------------------------------
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#ifdef __cplusplus
119+
extern "C" {
120+
#endif
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/** System Clock Configuration
123+
*/
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WEAK void SystemClock_Config(void)
125+
{
126+
RCC_OscInitTypeDef RCC_OscInitStruct = {};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
128+
RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
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/** Configure the System Power Supply
131+
*/
132+
if (HAL_PWREx_ConfigSupply(PWR_SMPS_SUPPLY) != HAL_OK) {
133+
Error_Handler();
134+
}
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/** Enable Epod Booster
137+
*/
138+
if (HAL_RCCEx_EpodBoosterClkConfig(RCC_EPODBOOSTER_SOURCE_MSIS, RCC_EPODBOOSTER_DIV1) != HAL_OK) {
139+
Error_Handler();
140+
}
141+
if (HAL_PWREx_EnableEpodBooster() != HAL_OK) {
142+
Error_Handler();
143+
}
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/** Configure the main internal regulator output voltage
146+
*/
147+
if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) {
148+
Error_Handler();
149+
}
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/** Set Flash latency before increasing MSIS
152+
*/
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__HAL_FLASH_SET_LATENCY(FLASH_LATENCY_2);
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/** Configure LSE Drive Capability
156+
*/
157+
HAL_PWR_EnableBkUpAccess();
158+
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
159+
160+
/** Initializes the CPU, AHB and APB buses clocks
161+
*/
162+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI
163+
| RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE
164+
| RCC_OSCILLATORTYPE_MSIS;
165+
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
168+
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
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RCC_OscInitStruct.LSIState = RCC_LSI_ON;
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RCC_OscInitStruct.LSIDiv = RCC_LSI_DIV1;
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RCC_OscInitStruct.MSISState = RCC_MSI_ON;
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RCC_OscInitStruct.MSISSource = RCC_MSI_RC0;
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RCC_OscInitStruct.MSISDiv = RCC_MSI_DIV1;
174+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
175+
Error_Handler();
176+
}
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178+
/** Initializes the CPU, AHB and APB buses clocks
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*/
180+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
181+
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
182+
| RCC_CLOCKTYPE_PCLK3;
183+
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSIS;
184+
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
185+
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
187+
RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;
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189+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
190+
Error_Handler();
191+
}
192+
193+
/** Initializes the peripherals clock
194+
*/
195+
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_DAC1SH | RCC_PERIPHCLK_ICLK
196+
| RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USB1;
197+
PeriphClkInit.Dac1SampleHoldClockSelection = RCC_DAC1SHCLKSOURCE_LSE;
198+
PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI;
199+
PeriphClkInit.IclkClockSelection = RCC_ICLKCLKSOURCE_HSI48;
200+
PeriphClkInit.Usb1ClockSelection = RCC_USB1CLKSOURCE_ICLK;
201+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
202+
Error_Handler();
203+
}
204+
}
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#ifdef __cplusplus
206+
}
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#endif
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#endif /* ARDUINO_STDES_MB2095 */

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