[CI probe — do not merge] up/mega x master integration - #1765

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Commits on Jul 23, 2026

spike(l0-blocks): closed-loop rebalancer (detect->migrate->re-level), bit-identical (l0_rebalance_interval)
sbryngelson
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0443fbb
spike(l0-blocks): beta - tiles own storage, L0 demoted to I/O staging (gather at output), all paths bit-identical
sbryngelson
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29757a8
spike(l0-blocks): GPU migration - device pack/unpack for migrate+scatter, bit-identical on nvfortran OpenACC (2xA100)
sbryngelson
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0aabc42
spike(l0-blocks): real measured-cost feedback (GPU-synced per-tile timing, allreduced), reproducible on CPU+GPU
sbryngelson
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2585175
spike(l0-blocks): reflective (symmetry) domain-edge BC for tiles, bit-identical 2D+3D np=1/2
sbryngelson
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02a3eba
spike(l0-blocks): periodic BC for tiles at np=1 (self-wrap + cross-tile wrap-seam), bit-identical 2D+3D
sbryngelson
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d8576aa
spike(l0-blocks): periodic BC at np>1 (allreduce rank-0-only periodic_bc -> consistent wrap-seam list), fixes cross-rank deadlock, bit-identical
sbryngelson
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adfdcfb
spike(l0-blocks): smooth rebalancer per-tile cost with an EMA across windows, halves noise-driven migration churn (bit-identical)
sbryngelson
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46565e5
spike(l0-blocks): make branch precheck-clean (format pass, param docs, lint fix), bit-identity re-verified
sbryngelson
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0351170
proto(l0-amr-unify): L0 tiles -> level-0 base (rr=1 per-slot override), spike bit-identical 2D+3D [Option 2 foundation]
sbryngelson
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884af71
proto(l0-amr-unify) step1: split amr_max_blocks into amr_max_fine (cap) + l0_slot_off (tile prefix), behavior-neutral [spike-only + AMR np1==np2 byte-identical]
sbryngelson
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1ebff0e
test(l0): forced cross-rank tile-migration golden (np=2, fixed dt) - runs the device pack/unpack P2P path that CI must exercise on Cray/AMD-flang (no other test hits it)
sbryngelson
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9abd282
fix(l0): gfortran/ifx portability - s_l0_copy_coarse_to_tiles q_cons_vf intent(in)->intent(inout) (passed to bidirectional s_l0_copy_block inout dummy; nvfortran allowed it, GNU/Intel reject)
sbryngelson
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83f7bf0
fix(l0): nest mod() under l0_rebalance_interval>0 guard - amdflang integer div-by-zero SIGFPE on test 33866935
sbryngelson
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22bd925

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riemann: delete flux_n and flux_gsrc_n, reading the flat Riemann buffers directly
sbryngelson
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724ef4f

Commits on Aug 6, 2026

Commits on Aug 10, 2026

docs: AMR profiling results - rhs is 82.6% of wall, regrid is 1.9%
sbryngelson
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b68c727

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