[BREAKING CHANGE] reorganize and unify STM32 ports#19004
Conversation
|
It would be good to pinging everyone who uses stm32 with nuttx |
08fef3a to
65180d0
Compare
|
I will port it to 13.0 |
|
FYI to all people who have contributed to stm32 recently or I know that in the past they were interested in stm32 with nuttx. This PR will be a breaking change for most stm32 users. For those who are not interested in nuttx - sorry for the pinging :) In short, the goal of this PR is simple: unification of STM32 ports. No more unnecessary code duplication, incompatible Kconfig options and arch specific API. Ultimately, maintaining the code, applying changes, and adding new stm32 ports should be easier. However, this requires a hard breaking change that unifies and standardizes many things. The changes in this PR are the first step that contains most of the necessary breaking changes and these changes should be part of the upcoming release 13.0. With this PR all architecture API is unified and uses @alexcekay @ImBonkers @patrickelectric @csanchezdll @cjj66619 @dlizewski @shizacat @ppisa @pbarada @neilberkman @matiamic @vrmay23 @kywwilson11 @zdebanos @rzsa @davids5 @antmerlino @fjpanag @hartmannathan @michi-jung @juniskane @onegray @mlyszczek @stbenn @daniel-p-carvalho @rcsim |
|
Hi @raiden00pl In the summary of changes you wrote:
That is an excellent idea, but may I ask where you get the IP core versions from? When I asked an FAE from STMicroelectronics I was told that they do not publish the IP core version number per STM32 type. Thanks! |
|
This is a huge change and I will need some time to dig deep in and understand all the consequences. Just some initial thoughts.
So far I am sceptical towards this. One of the greatest NuttX design characteristics is the simplicity of source code and its arch section. Having a directory with common drivers with various compile time or runtime conditions deciding what code should be run breaks this simplicity. Yes, the current approach can bring some duplicity, but I still think it's a better approach. I would cite NuttX principles here: We need to really consider this, because the architectural design is what makes NuttX accessible. It's super easy to explain someone the driver's organization and the relation between boards and arch section. You just call
This on the other hand is something I agree with. I will need to take a detailed look, but I like the idea BSPs would serve mainly for pin definitions and would call the common init functions. After all, these functions are nothing more than arch init call and character device driver registration.
+1 this is great, searching in or editing one large Kconfig file is a pain. Maybe I would just move all those |
|
@michi-jung This is the hardest part, it has to be done by ourself. I used to do it manually, now the comparison can be easily automated with LLM. ChibiOS might provide some guidance: https://github.com/ChibiOS/ChibiOS/tree/master/os/hal/ports/STM32/LLD |
@michallenc Some code duplication makes sense. Code duplication across ~20 families and all posbile peripherals is pointless and difficult to maintain, especially when IP core implementations are shared between families. The problem here is that ST doesn't provide this information in an easy and readable way. Therefore, we can use ChibiOS whose author is or was an ST employee: https://github.com/ChibiOS/ChibiOS/tree/master/os/hal/ports/STM32/LLD
That's why documentation was created that directly indicates which IP core is used by which family. Regarding the STM32L4 - this port was created based on the principle that "code duplication is not a bad thing." Currently, this code has drifted from the rest of the ports to the point that it's the worst to generalize, and it uses essentially the same peripherals as other STM32 M4s. If we're duplicating code, we should duplicate it for all families, not as currently, where some are done this way, some are done that way ( |
65180d0 to
50a8628
Compare
|
It appears that CODEOWNERS is still keeping |
0413304 to
319feeb
Compare
hartmannathan
left a comment
There was a problem hiding this comment.
Hi, @raiden00pl thanks for taking this HUGE task upon yourself! I have sometimes been frustrated by the stm32 support being disjoint because of the different families being treated as different archs. This is a substantial change so I just want to kindly ask you to bear with me, because it will take me some time to review and test.
Yes, although STM doesn't document the actual version numbers of the peripheral IP blocks, we can ascertain this information based on the functionality they expose via registers and register bits. We can think of the registers and bits as the API of the peripherals. If the APIs match, we can consider the peripherals to be the same version. It's possible that the register addresses may be different, or that the bits within the register might be in a different position or order. So we might need some kind of "fuzzy matching". |
@raiden00pl, I am an AI skeptic. :-) Out of curiosity, would you be willing to share the prompts you used? It could be a blog post or something like that, to document how the changes were made as well as a learning resource for others who are trying to wrap their heads around this new way of working. |
|
How can I support with testing stm32h7 and F7 family?
…On Mon, Jun 1, 2026, 20:31 hartmannathan ***@***.***> wrote:
*hartmannathan* left a comment (apache/nuttx#19004)
<#19004 (comment)>
For all AI skeptics here - this PR was created with AI assistance and
burned hundreds of dollars worth of tokens. There is no other way to do it,
doing it manually is unrealistic, especially if you do it alone and for
free :) This PR doesn't add new code, it only organizes the old code, so
the code license remains the same as the original code
@raiden00pl <https://github.com/raiden00pl>, I am an AI skeptic. :-) Out
of curiosity, would you be willing to share the prompts you used? It could
be a blog post or something like that, to document how the changes were
made as well as a learning resource for others who are trying to wrap their
heads around this new way of working.
—
Reply to this email directly, view it on GitHub
<#19004?email_source=notifications&email_token=BO3QXU27YGTA4RXDT3EMOIL45XDXXA5CNFSNUABFM5UWIORPF5TWS5BNNB2WEL2JONZXKZKDN5WW2ZLOOQXTINJZGUZTSMJZGA42M4TFMFZW63VHNVSW45DJN5XKKZLWMVXHJLDGN5XXIZLSL5RWY2LDNM#issuecomment-4595391909>,
or unsubscribe
<https://github.com/notifications/unsubscribe-auth/BO3QXU7XKYUTKHVIXIQ4ORL45XDXXAVCNFSM6AAAAACZUL6Y4GVHI2DSMVQWIX3LMV43OSLTON2WKQ3PNVWWK3TUHM2DKOJVGM4TCOJQHE>
.
You are receiving this because you were mentioned.Message ID:
***@***.***>
|
|
@hartmannathan I had an idea and plan for this reorganisation for years in my private notes, but it was not possible to do it manually without investing months of work. This wasn't a task that could be solved with a few prompts. The AI has too small context for this and isn't able to think outside the box very well. AI was used here more like an "intelligent tool" for things that I would have had to do manually. I don't have a single master prompt but used many simple prompts in an interactive workflow. I just instructed AI how I would do it step by step, like: "rename all public STM32 arch API to use common prefix stm32_", "move all stm32f0l0g0 files to common/stm32 and rename them to use the m0 suffix", "build set of configuration after each step" and so on. In fact, the order of commits exactly reflects my plan from the beginning. With such a huge change, keeping git history clean manually is a really big challenge, but for AI this is a really simple job. Moving files, fixups, squashing commits, and resolving conflicts is something that takes hours for a human, but can be easily done by AI. There were more issues that AI was not able to solve without manual intervention, like optimizing complex dependencies in Kconfig or even merge similar header files. There are still many complex conditions in Kconfig that must be simplified, but this is work for a human and careful analysis; AI has no idea how to properly solve it. |
|
@vrmay23 Any compilation of externally maintained boards and configurations will be useful. Upstream configurations should be OK now (CI pass), but upstream boards don't provide full coverage for stm32 architectures features, so the more out-of-tree configurations we compile, the greater the certainty that there will be no regressions. F7 and H7 have no functional changes, so if the code compiles - it should work. Unless some Kconfig option was not migrated correctly - with such a big change there's always a chance of that |
I agree the support for STM32 is quite messy and STM doesn't make it easy with their naming convention. We don't need duplicate implementations for f1, f2, f3 and so on though. These can be in one common folder, if the chips are the same (or with really little changes). We also have imxrt1060 and imxrt1170 in common But with this change, we would not only mix different IP core implementations in one directory but also different Cortex versions if I understand it correctly. And this is something I think we should duplicate. From my point of view the unification abandons the way we wrote the code for many years and I am afraid we open a Pandora box leading to more messy and unclear code. It also forces us to assign IP core versions to chips - yes, we can automate it by relying on 3rd party project which may end in a year or two or on LLM, which is even worse, because we can't trust that thing. So we have to do it manually by comparing registers and hoping we got it right. But that's a minor issue we can handle. |
BREAKING CHANGE: STM32WL5 Kconfig symbols were renamed from CONFIG_STM32WL5_* to CONFIG_STM32_*. Out-of-tree code must update defconfigs and Kconfig references to the new CONFIG_STM32_* names. Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: STM32N6 Kconfig symbols were renamed from CONFIG_STM32N6_* to CONFIG_STM32_*. Out-of-tree code must update defconfigs and Kconfig references to the new CONFIG_STM32_* names. Signed-off-by: raiden00pl <raiden00@railab.me>
Update shared STM32 documentation references after moving common options to the shared STM32 Kconfig namespace. Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: Duplicate STM32 Kconfig option definitions moved into arch/arm/src/common/stm32. Move duplicated non-ARCH STM32 Kconfig definitions out of the family Kconfig files and into common/stm32. Keep one definition per moved symbol in common/stm32. Use hidden family and symbol availability guards so the user-visible definitions keep the type/prompt line first without repeating config names. Leave driver-owned serial DMA prompts to the generic serial Kconfig to avoid duplicate menu entries. Out-of-tree Kconfig files that source family-local duplicate definitions must source the common STM32 Kconfig definitions instead. Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: Common STM32 Kconfig options moved to arch/arm/src/common/stm32. Out-of-tree family Kconfig files must source the common STM32 Kconfig files from their new path. Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: STM32 peripheral Kconfig options moved to arch/arm/src/common/stm32. Out-of-tree Kconfig files must update source paths and symbol references to the common STM32 option location. Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: Common STM32 source and private header files moved to arch/arm/src/common/stm32. Out-of-tree code that references family-local common source paths must update includes, build rules, and source paths to the new common STM32 location. Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: CONFIG_STM32_QUADSPI is removed. Board configurations that selected CONFIG_STM32_QUADSPI must now use CONFIG_STM32_QSPI. The QUADSPI/QSPI IP block was enabled by two different Kconfig symbols depending on the family: STM32_QUADSPI (F7/H7) and STM32_QSPI (L4/WB/G4). Both select the same peripheral. Unify them under the single STM32_QSPI symbol and remove STM32_QUADSPI. The arch sources, RCC enables, build files and board configurations are updated accordingly. Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: Move the existing STM32 board common sources to boards/arm/common/stm32 and fold in the common STM32F0/L0/G0/C0 board helpers so split STM32 board families can share one source tree. Keep board-common discovery on the existing ../common path by replacing the old family common directories with links to the shared tree instead of adding STM32-specific fallback logic to global Make or CMake files. Signed-off-by: raiden00pl <raiden00@railab.me>
Add boards/arm/stm32l4/common so STM32L4 boards build through the shared STM32 board-common tree (boards/arm/common/stm32), like the other split STM32 families. Convert each STM32L4 board's src/Makefile to src/Make.defs so the per-board sources are pulled in by the common board Makefile. Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: The combined STM32F0/L0/G0/C0 architecture and board paths were split into stm32f0, stm32l0, stm32g0, and stm32c0 directories. Out-of-tree boards, include paths, source paths, and defconfigs must move from stm32f0l0g0 to the matching split family. Signed-off-by: raiden00pl <raiden00@railab.me>
…stm32g4 BREAKING CHANGE: The legacy STM32 architecture and board paths were split into stm32f1, stm32l1, stm32f2, stm32f3, stm32f4, and stm32g4 directories. Out-of-tree boards must move from stm32 to the matching split family. Signed-off-by: raiden00pl <raiden00@railab.me>
fix various stm32 boards errors found by CI Signed-off-by: raiden00pl <raiden00@railab.me>
update arm-13.dat build targets so they match state before stm32 split Signed-off-by: raiden00pl <raiden00@railab.me>
add STM32 porting guide Signed-off-by: raiden00pl <raiden00@railab.me>
Remove the six family-local *_waste.c/.h copies (stm32l4, stm32l5, stm32wb, stm32wl5, stm32u5, stm32f7) and to common implementation. Signed-off-by: raiden00pl <raiden00@railab.me>
Replace the per-family stm32_get_uniqueid() implementations and the two IP-versioned common variants with a single generic byte-array reader, arch/arm/src/common/stm32/stm32_uid.c. BREAKING CHANGE: stm32_get_uniqueid() now always takes a uint8_t[12] buffer. Out-of-tree Cortex-M0 code that used the previous prototype "void stm32_get_uniqueid(uint32_t *uid)" must change its buffer to "uint8_t uniqueid[12]". Signed-off-by: raiden00pl <raiden00@railab.me>
fix compilation error Signed-off-by: raiden00pl <raiden00@railab.me>
fix compilation error Signed-off-by: raiden00pl <raiden00@railab.me>
Add arch/arm/src/stm32f7/stm32.h modeled on stm32f4/stm32.h, using the STM32F7 header names. Signed-off-by: raiden00pl <raiden00@railab.me>
stm32f4discovery, nucleo-f446re and omnibusf4 each declared their own STM32_ROMFS Kconfig options and carried a near-identical copy of stm32_romfs_initialize.c. Signed-off-by: raiden00pl <raiden00@railab.me>
switch stm32f7 board common to boards/arm/common/stm32.
Move the STM32F7-only board-common features into the shared directory
so they are available to every STM32 family:
- bmi270, cs4344, can_setup, cansock_setup, reset, romfs_initialize and
spitest
- the duplicate stm32_bh1750 is removed (already present in common).
Signed-off-by: raiden00pl <raiden00@railab.me>
…ard logic The board-common stm32_reset.c and stm32_romfs_initialize.c are already provided by boards/arm/common/stm32. Remove the redundant local copies from stm32f103-minimum, nucleo-f429zi, stm32f401rc-rs485 and stm32f4discovery. Enable CONFIG_ARCH_BOARD_COMMON=y in the stm32f4discovery and stm32f401rc-rs485 configs that use CONFIG_BOARDCTL_RESET so board_reset() is pulled from the shared directory. The omnibusf4 reset.c is kept local (genuine DFU-mode reset). Signed-off-by: raiden00pl <raiden00@railab.me>
No functional change: the single board does not yet use any shared driver, but the shared board-common features are now available to the family. Signed-off-by: raiden00pl <raiden00@railab.me>
Wire the STM32H7 family to the shared boards/arm/common/stm32 board-common
directory.
Drop the local copies that are already provided by the shared directory:
- stm32_reset.c from nucleo-h723zg, nucleo-h743zi, nucleo-h743zi2,
nucleo-h753zi, stm32h745i-disco and stm32h750b-dk
- stm32_romfs_initialize.c and stm32_romfs.h from nucleo-h743zi (identical
to the shared versions)
Enable CONFIG_ARCH_BOARD_COMMON=y in the configs that use CONFIG_BOARDCTL_RESET
or CONFIG_STM32_ROMFS so board_reset()/romfs are pulled from the shared
directory.
Signed-off-by: raiden00pl <raiden00@railab.me>
Wire the remaining STM32 families (L5, U5, WB, WL5, N6) to the shared boards/arm/common/stm32 board-common directory. No functional change: these boards do not yet use any shared driver, but the shared board-common features are now available to the families. Signed-off-by: raiden00pl <raiden00@railab.me>
Merge the six near-identical pulse count drivers (two common, plus the F7/H7/H5/L4 copies) into a single common/stm32/stm32_pulsecount.c that pulls register definitions through the per-family "stm32.h" umbrella. Signed-off-by: raiden00pl <raiden00@railab.me>
Drop the L4 1-Wire copy and build the shared common/stm32/stm32_1wire_m3m4_v1.c for L4. L4's USART is the standard V3 IP, so make its headers follow the same conventions the common families already use: alias the legacy SR status names onto ISR (as stm32_uart_v3.h does) and add the canonical APB1ENR clock-enable aliases (as the G4 RCC header does). The shared driver then needs no per-chip special-casing. Signed-off-by: raiden00pl <raiden00@railab.me>
Merge the per-family LSI oscillator drivers into a single core-agnostic common/stm32/stm32_lsi.c. To let a common/stm32 driver resolve RCC register definitions for every family without a central chip enumeration, the common/stm32/hardware/stm32_rcc.h dispatcher is removed and each family now provides its own hardware/stm32_rcc.h. Signed-off-by: raiden00pl <raiden00@railab.me>
319feeb to
438655e
Compare
Summary
This PR is the first step toward unification and reorganisation of STM32 ports. This is a huge, breaking change that impacts many users. It also introduces the standard for STM32 ports described in the documentation page. Any new STM32 port or new STM32 feature should adhere to these rules.
This reorganization allows for the separation of STM32 families with minimal code duplication. Ultimately, we'll be able to eliminate most of the duplication between STM32 families, but this is a long-term task. Subsequent changes won't be as invasive, and most won't require breaking changes.
This PR focuses on the first step in the STM32 redesign, which is the most invasive and includes a lot of breaking changes.
Summary of changes:
What is not done yet:
The stm32f7, stm32h7, and stm32l4 should be easy. The rest, based on the Cortex-M33, will require more time because I'm not familiar with these chips yet. After this migration, support for the missing stm32 families should be much easier.
This change will later enable us to solve another problem - the standardization of ST boards, so all nucleo board follows the same patterns and provide the same features.
I know this PR is huge, but it can't really be done in smaller steps. This is an attempt to fix a problem that's been building for over a decade. I will create a separate PR so it is easier to review, this PR is to show the final effect . The best way to review this change is to download the entire branch and view it locally. Github is unable to render changes well and misses many git rename operations.
If the community deems this change desirable, it should be included in version 13.0, as it's a significant change that's causing a lot of disruption. I think this is the best time for this reorganization, even if it will upset many users and likely break something.
For all AI skeptics here - this PR was created with AI assistance and burned hundreds of dollars worth of tokens. There is no other way to do it, doing it manually is unrealistic, especially if you do it alone and for free :) This PR doesn't add new code, it only organizes the old code, so the code license remains the same as the original code
References:
#18894
#16172
Impact
Breaking change that impacts many users. There should be no functional changes; users should only need to update defconfig options in theory, but this is a huge change done mostly with AI assistance, so there is some chance that things will be broken.
The larger the PR, the greater the chance that something will break uncontrollably. Therefore, if this change is to be implemented upstream, it should be in release 13.0, which already contains a lot of breaking changes.
I tried to preserve the git history as much as possible, but for Kconfig it was not possible.
What we gain from this PR:
No more questions about how to create new STM32 ports, everything is set in advance and the user has to comply.
Testing
CI
upstream build and test on HW:
Later I will do tests with my Dawn project (https://github.com/railab/dawn) where I have a lot of HW automated tests based on NTFC, so it should catch most of the regressions.