arch/arm/src/stm32hx/stm32_adc: Reset channel counter before conversions.#19013
Conversation
Signed-off-by: Sammy Tran <sammytran@geotab.com> Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com> AI-Model: claude-sonnet-4.6
Signed-off-by: Sammy Tran <sammytran@geotab.com> Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com> AI-Model: claude-sonnet-4.6
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Why is this the correct behaviour? To my knowledge, the ADC drivers with multiple channels take the approach that doing multiple reads return channel measurements one-by-one (i.e. first read call return CH1, then second call is CH2, etc.). With this change, anyone using |
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@linguini1 This particular driver does not have single channel conversion supported. Conversion of all channels are triggered by the ioctl, and samples are read from the file. Depending on when the file is read (between ISRs or after all the channels are converted), it can be one or more samples. |
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Ah, I see. So right now the flow is:
And this change makes it:
Is that right? If so, I still don't fully understand why it's more desirable for a re-trigger to start from 0 again? It seems fine but hopefully this isn't different behaviour from other NuttX ADC drivers or that will get confusing. The ADC driver is kind of poorly designed to begin with. |
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@linguini1 Yes, that's correct. The reason it's necessary is correctness rather than preference: |
Summary
When an ADC conversion sequence is triggered via the ANIOC_TRIGGER ioctl, the priv->current channel counter was not being reset before starting the conversion. This meant that if a previous conversion sequence had ended mid-way through the channel list (e.g., due to an error or partial read), subsequent triggers would resume dispatching au_receive callbacks from the wrong channel index, corrupting the channel-to-data mapping reported to the upper half.
This fix resets priv->current to 0 immediately before calling adc_startconv() in the ANIOC_TRIGGER handler, ensuring the interrupt handler always starts dispatching results from the first channel in the sequence. The same fix is applied consistently to both the STM32H5 and STM32H7 ADC drivers, which share the same architecture and bug.
Impact
Users relying on the ANIOC_TRIGGER ioctl to initiate ADC conversion sequences on STM32H5 or STM32H7 targets could receive channel data attributed to the wrong channel number if the internal current counter was in a non-zero state when the trigger fired. This is a silent data corruption — no error is returned. After this fix, every triggered conversion sequence correctly begins at channel index 0.
Testing
Tested on an STM32H5-based board with the following defconfig and 12 ADC channels
With an application that does the following:
Pre-fix
Post fix