Build the Qwen3 attention mask in the query dtype - #34
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Since #33 the Qwen3 encoder's additive mask goes through the fused SDPA kernel, whose CUDA memory-efficient backend requires the bias dtype to match the query; the mask was always float32 against bf16 q/k/v, so every FLUX.2 prompt encode on GPU failed with 'invalid dtype for bias'. Build the mask in the embedding dtype instead: -10000 fill (the dit_ltx23 convention; -3.4e38 overflows bfloat16 to -Inf) and the $neg()$add(1) chain, since the Ops dispatch materializes R scalars as Float tensors and promotes the result.
TroyHernandez
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Jul 20, 2026
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Every FLUX.2 prompt encode on CUDA failed with "invalid dtype for bias - should match query's dtype" since #33 routed the Qwen3 encoder's additive mask through the fused SDPA kernel, whose memory-efficient backend requires the bias dtype to match the query. The mask was always float32 against bf16 q/k/v.
The mask is now built in the embedding dtype. Two adjacent traps handled along the way:
1 - tensorOps dispatch materializes the scalar as a dimensioned Float tensor and promotes bf16 back to f32, so the pad term uses the$neg()$add(1)$mul()chain instead (upstream fix proposed in Preserve tensor dtype when the left operand is an R scalar mlverse/torch#1471).Verified with a kernel-level repro and a small-config encoder forward: CUDA bf16 and CPU f32 both pass with finite outputs. The LTX-2.3 transformer already casts its masks to the hidden-state dtype, so the stv path was unaffected.