fix(rp2040): clear stale EPX buf_ctrl AVAIL bit before arming a transfer

[tendrils]

What

hcd_edpt_xfer() clears any stale USB_BUF_CTRL_AVAIL bit in epx_buf_ctrl before arming a new transfer on EPX.

Why

EPX is shared by every non-interrupt endpoint of every connected device. The hardware does not reliably clear USB_BUF_CTRL_AVAIL in epx_buf_ctrl once a transaction completes. When the next EPX user re-arms immediately — with no intervening scheduler tick — bufctrl_write32() sees the leftover AVAILABLE bit from the finished transaction and panics:

buf_ctrl @ 0x... already available

despite nothing actually being in flight.

Reproducing

Seen consistently with a USB-MIDI host on RP2040. The MIDI class driver's xfer-complete callback synchronously starts the next transfer on every zero-byte completion, which makes the re-arm immediate enough to hit this reliably. It presents as a hard panic partway through a MIDI session rather than at enumeration, which made it slow to attribute.

Why this is safe here

At this point hcd_edpt_xfer() has already established, under the same critical section, that no endpoint currently owns EPX — the preceding check tests epx->state, and software's own state is the authority on EPX ownership rather than the hardware bit. So a set AVAILABLE bit at this point can only be a leftover, and clearing it cannot discard a live transaction.

Notes

Draft: this is running in a downstream project against real hardware, but I have not exercised it beyond the RP2040 host path (MIDI class, full speed). Happy to adjust the placement or the comment if you would rather handle it inside rp2usb_xfer_start() / bufctrl_write32() instead — the fix is deliberately narrow and placed where the ownership check already is, but I do not have a strong view on where it belongs.

[Copilot]

Pull request overview

This PR addresses a host-mode RP2040 USB issue where the EPX shared buffer-control register may retain a stale USB_BUF_CTRL_AVAIL bit after a transaction completes, causing bufctrl_write32() to panic when the next transfer is armed immediately.

Changes:

• Clear usbh_dpram->epx_buf_ctrl before arming a new EPX transfer in hcd_edpt_xfer().
• Add an in-code rationale explaining why the clear is safe given EPX ownership is determined by software state under the same critical section.

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