Add 16bit xtensa depthwise conv kernel support#3481
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narrietal wants to merge 1 commit intotensorflow:mainfrom
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Add 16bit xtensa depthwise conv kernel support#3481narrietal wants to merge 1 commit intotensorflow:mainfrom
narrietal wants to merge 1 commit intotensorflow:mainfrom
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Hi @narrietal, Thank you for this PR. Can you please resolve the failed test cases for Hifi3z and Fusion F1 platforms and update the PR? |
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This PR adds support for the optimized Xtensa depthwise convolution kernel when using 16-bit activations and 8-bit weights. Previously, this configuration would fall back to the reference implementation.
Changes:
bug=fixes #3484