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Rename some (wrong named) macro in samv71q-pinctrl.h for AFEC0 pins #39
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note that I didn't change the comment above the macro definition |
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I think the changes for AD pins for AFEC0 / AFEC1 are done. I have tested on the EVB of ATSAMV71Q21B (the sam_v71_xult board) by using a custom board folder with inside the devicetree (common and pinctrl). |
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Hi @zebo9x , Yes, you are right. There is a typo in the pinconfig file: hal_atmel/pinconfigs/sam-s70-e70-v7x.yml Lines 802 to 815 in 56d60eb
You should fix in there and regenerate the files. There are documentation in the repo that explains how it works. |
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Hi @zebo9x, Is there any news from your side? |
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Sorry for the (very) late update. I will submit all the news on the code this weekend |
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ping... |
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I have updated the pinconfigs of s70-e70-v7x and run the script to regenerate the proper include files. I have written a commit message acording to the guidelines. But I have commited to the master and not to the branch "patch-1". After this I have moved the commits into the correct branch. I'm sorry for the delay and thanks to the ping notifications. |
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Hi @zebo9x , It is necessary a few changes: |
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Is there any updates on when this might be reviewed/merged (or if I can assist)? I'm currently working on a project which requires this fix and currently am working off a patched version of this repo as a consequence. |
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This weekend I'll have some time to rebase in one single commit and check if is all correct. |
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ping |
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I did a rebase squashing all the commits in one and reworded the commit message, trying to follow the guidelines. In in for advices if is something wrong. My apologies for the looong waiting time. |
Hi @zebo9x , Thank you for the changes. There seems to be fine now. I'm waiting the fixes and the zephyr side PR to allow us to move forward here. |
The pin macro for SAM V71 Q relative to PE5 is named as if it is relative to AFEC1 AD3 (PE5X_AFE1_AD3). Same typo can be found for the pin PE4 for the AFE1 AD4 that is AFE0 AD4. The pinconfig YAML for the s70, e70 and v7x has a typo for the AFEC. The typo is this: AFEC0 AD3 and AD4 was referenced for AFEC1 instead of AFE0. The solution proposed in this commit is: - Edit the pinconfigs YAML for [s,e]70, v7x. - Run the sampinconfig.py script to regenerate the includes Signed-off-by: zebo9x <[email protected]>
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Commit message fixed. Sorry for having missed this rule. |
It is Ok! Now you need to open a PR in https://github.com/zephyrproject-rtos/zephyr which Bump this PR there. See this documentation. |
The pin macro for SAM V71 Q relative to PE5 use as AFEC0 AD3 is now named PE5X_AFE0_AD3. Previously it was named as if it is relative to AFEC1 AD3 (PE5X_AFE1_AD3). A check can be made by reading the pinout table of ATSAMV71 for 144 pinout (datasheet: https://ww1.microchip.com/downloads/aemDocuments/documents/MCU32/ProductDocuments/DataSheets/SAM-E70-S70-V70-V71-Family-Data-Sheet-DS60001527.pdf) (start fo the table: page 28; relevant table section: page 33, LQFP pin 28).